[ Biography ]

Dr. Chee Lip GAN received his B.Eng (Electrical) from the National University of Singapore in 1999. He received his Ph.D. in Advanced Materials for Micro- and Nano-Systems under the Singapore-MIT Alliance (SMA) Program in 2003. He was awarded the Best Research Project during the graduation of the pioneer batch of SMA PhD students. His contribution in his research area was recognized through the award of the Best Paper in Reliability at the 9^th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) in 2002, and the Silver Award at the 2003 MRS Spring Meeting Graduate Student Award.

Dr Gan is currently an Associate Professor in the School of Materials Science and Engineering (MSE). He was the Assistant Chair (Alumni & Graduates) of MSE from 2006 – 2008. He is also currently a SMA Fellow in the Advanced Materials for Micro- and Nano-Systems under the Singapore-MIT Alliance Program, a Faculty Associate of the Instituteof Microelectronics, and a Visiting Scientist at the Massachusetts Institute of Technology.

Dr Gan has served in the executive committee of IEEE Singapore Reliability/CPMT/ED Chapter since 2004. He is currently the Vice-Chairman, having previously held the position of treasurer. He is also the General Chair of the 17^th IPFA 2010, having served as the General co-Chair in 2009, Technical Chair in 2008, Technical Co-chair in 2006 and 2007. He is currently a Senior Member of IEEE.

The focus of Gan’s research group encompasses different aspects of the interconnect technology, from the micro to nano-scale.They include:

• Reliability study of state-of-the-art copper interconnect/low-k systems, such as copper electromigration, time-dependent-dielectric-breakdown of low-k dielectrics and new assessment methodology for circuit level reliability projection.
  
  
• Characterization and modeling of the mechanical and electrical properties of copper-copper bonds in the realization of 3D interconnects through wafer bonding and through silicon vias. This project also investigates the application of low temperature solders for integration of heterogeneous systems.
  
  
• Fabrication of metallic nanowires by a template method as interconnects is also being investigated. Work is carried out to characterize the morphology and electrical properties of the nanowires to assess its suitability for actual applications.