Compact Modeling for Novel III-V Devices (PhD) – The project is directed towards development of compact models  for III-V transistors, such as GaN-based HEMTs, for circuit design and simulation in future generation of III-V/Si integrated platforms.  The scope of research includes intrinsic/extrinsic transistor models for DC/AC, RF, power applications, which is part of two large national programs (A*STAR/IME and SMART-LEES).

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