Process models: diffusion, oxidation, implantation. Process variables/targets: doping profiles, junction depths, oxide thickness. Process simulation: Simulate a given sub-micron CMOS process recipe and study profiles and layer structures. Physical models. Numerical algorithms and solutions. Device performance parameters. Short-channel effects. DC simulations. Device simulation: Simulate the DC characteristics of the “fabricated” device and analyze device operation with respect to potential, field, and carrier distributions as well as terminal I–V characteristics. Wafer-split experiment. Device-target vs. process-variable relations. Transistor performance optimization/trade-offs through process variation. Technology development and optimization. Design of Experiment (DOE): Implement a computer experiment to study the scaling characteristics (varying gate length) of the given sub-micron technology. Study the influence of process variations on device performance parameters.

Notes - VPI

Design Exercise

    References

Simon Sze and Ming-Kwei Lee, Semiconductor Devices - Physics and Technology, 3rd ed., Wiley (2013).

Chenming Calvin Hu, Modern Semiconductor Devices for Integrated Circuits, Pearson (2010).

Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge Univ. Press (2009).

Arora Narain, MOSFET Models for VLSI Circuit Simulation – Theory and Practice, Springer-Verlag (1993). Reprinted by World Scientific (2006).

VisualFab User's Guide 

• Link to EE4613 (E425/E422/E411/EE4611/EE4613)
• GIST - NTU-TUM MSc in Green Electronics (Microelectronics)